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Cache Average Access Time

  • HH is the hit rate of cache level LiL_i
  • TiT_i is the access time of level LiL_i
  • RiR_i is the burst rate per word of level LiL_i (after startup access time)
  • BB is the block size

TaverageT_\text{average} with L1L_1 cacheโ€‹

Then there are two possible cases.

  • We have a hit and only pay L1L_1 cache time.
  • We miss and read the whole block to L1L_1

Therefore, Average Access Time TaverageT_\text{average} is (Hit Time) T1T_1 + (Miss Ratio) (1โˆ’H1)(1-H_1) ร— (Miss Penalty) (Tmainย memory+Bร—Rmainย memory)(T_\text{main memory} + B \times R_\text{main memory})

Taverage=T1+(1โˆ’H1)ร—[Tmainย memory+Bร—Rmainย memory]T_\text{average} =T_1 + (1-H_1) \times [T_\text{main memory} + B \times R_\text{main memory}]

TaverageT_\text{average} with L2L_2 cacheโ€‹

  • Hit at L1L_1 cache
  • Hit at L2L_2 cache
  • We miss and read the whole block from memory


Taverage=T1+(1โˆ’H1)ร—H2ร—[T2+Bร—R2]+(1โˆ’H1)ร—(1โˆ’H2)ร—[T2+Tmainย memory+Bร—Rmainย memory]T_\text{average} =T_1 + (1-H_1) \times H_2 \times [T_2 + B \times R_2] + (1-H_1) \times (1-H_2) \times [T_2 + T_\text{main memory} + B \times R_\text{main memory}]